AK8186B Datasheet, PDF (36/69 Pages) Asahi Kasei Microsystems – Multi Output Clock Generator with Integrated 2.0GHz VCO

AK8186B
POWER DOWN MODES
The AK8186B has two modes of power down.
1) Chip power down
2) Block power down (PLL, REF1/2, VCO, VCO divider, CLK Input, OUT0 to 9)
Chip Power Down by PDn pin
Operation
: Puts all the blocks except the bias to the analog block into power down mode.
Condition
: PDn pin is asserted low
Operation Timing : immediately
Note
: The registers are not reset. Serial Control Port is active. If the AK8186B clock outputs
must be synchronized to each other, a SYNC is required upon exiting power down (see
the SYNCHRONIZING THE OUTPUTS – SYNC FUNCTION). A VCO calibration is not
required when exiting power down.
PLL Power Down
Operation
: The PLL goes into power-down.
Condition
: Write 0x10[1:0] = 01b or 11b, then updates the register ( 0x232[0] =1b).
Operation Timing :
Asychronous power-down mode : 0x10[1:0] = 01b
immediately after the register update is executed.
Synchronous power-down mode : 0x10[1:0] = 11b
synchronized with the up/down signal for the CP after the register update is executed.
This is for preventing the unwanted frequency jumps.
REF1, REF2 Power Down
Operation
: The REF1and/or REF2 goes into power-down.
Condition
: REF1: Write 0x1C[1] = 0b, then updates the register ( 0x232[0] =1b).
REF2: Write 0x1C[2] = 0b, then updates the register ( 0x232[0] =1b).
Operation Timing : immediately after the register update is executed.
Note
: The REF1/REF2 can not be powered down when Automatic Switchover is active.
VCO and CLK Input Power Down
Operation
: The VCO, VCO divider and CLK input section can be power down by 0x1E1[4:1]..
Condition
: Set 0x1E1[4:1] to the adequate value depending on your need, then updates the
register ( 0x232[0] =1b). See the register map function description of VCO, VCO divider
and CLK Input register (0x1E1).
Operation Timing : immediately after the register update is executed.
Distribution Power Down
Operation
: All of output buffers go into power-down.
Condition
: Write 0x230[1] = 1b, then updates the register ( 0x232[0] =1b).
Operation Timing : immediately after the register update is executed.
Sep-2012
- 36 -
draft-E-02