AK8186B Datasheet, PDF (46/69 Pages) Asahi Kasei Microsystems – Multi Output Clock Generator with Integrated 2.0GHz VCO

AK8186B
REGISTER MAP FUNCTION DESCRIPTIONS
Serial Port Configuration
Register
Address Bit(s) Name
(Hex)
7 SDO Active
6 LSB First
0x000 ^{5 Soft Reset}
Description
Selects unidirectional or bidirectional data transfer mode.
0: Bidirectional mode: (default)
SDIO pin used for write and read; SDO set high impedance.
1: Unidirectional mode:
SDO pin used for read; SDIO pin used for write.
MSB or LSB data orientation
0: data-oriented MSB first: addressing decrements. (default)
1: data-oriented LSB first: addressing increments.
Soft Reset
1: Soft Rest (not self-clearing); restores default values to internal registers.
Must be cleared to “0” to complete operation.
4 Long Instruction Should be always “1”: 16bit instruction(long).
0x003
0x004
3:0 Mirror[7:4]
Bit[3:0] should be always mirror [7:4] so that it does not matter whether the part
is in MSB or LSB first mode( see Register 0x00[6]). User should set bits as
follows.
[0]=[7]
[1]=[6]
[2]=[5]
[3]=[4]
7:0 Part ID
Part ID of the AK8186B. (read only)
AK8186B : 0x43
Read Back Active ^{Select register bank used for read back.}
0 _Reg.
0: read back buffer registers (default)
1: read back active registers
Sep-2012
- 46 -
draft-E-02