AK8186B Datasheet, PDF (42/69 Pages) Asahi Kasei Microsystems – Multi Output Clock Generator with Integrated 2.0GHz VCO

AK8186B
LSB first
The instruction and data are transferred from LSB. When the AK8186B executes multibyte access, the
address included in the instruction is the start address. Address increments at every data byte access.
Figure 35. LSB First Transfers
In both MSB and LSB first modes, streaming mode stops at the address of 0x232. Note that the reserved
and blank registers are not skipped.
Table 35 Stop Sequence in Streaming mode
Mode
Address Direction
LSB first
Increment
MSB first
Decrement
Stop Sequence
0x230, 0x231, 0x232, Stop
0x001, 0x000, 0x232, Stop
The serial control port is configured by the register 0x00[7:4]. 0x00[3:0] should be mirrored to 0x00[7:4]. This
makes it no matter whether the data is written from MSB or LSB.
Sep-2012
- 42 -
draft-E-02