HMC7044 Datasheet, PDF (8/72 Pages) Analog Devices – JESD204B clock generation

HMC7044
Data Sheet
Parameter
Reference Doubler Input
Frequency
R2 Input Frequency
PD2 Frequency (fPD2)
PLL2 CHARGE PUMP
Current Range (ICP2)
ICP2 Variation over PVT
Source/Sink Current
Mismatch
Current Step Size
Compliance Range
PLL2 NOISE PROFILE
Floor FOM
Flicker FOM
FOM Variation vs. PVT
FOM Degradation
PLL2 Flicker Noise
PLL2 Noise Floor
PLL2 Total Phase Noise
(Unfiltered)
PLL2 BANDWIDTH AND
ACQUISITION TIMES
Supported Loop
Bandwidths (PLL2_BW)
VCO Automatic Gain
Control (AGC) Settling
Time¹
VCO Calibration Time⁵
Temperature Range
Postcalibration¹
PLL2 Linear Acquisition
Time
PLL2 Lock Detect Timer
Period⁵
Min
Typ
Max
10
175
10
500
0.00015
250
160 to 2560
±25
2
160
0.3 to 2.45
−232
−266
±3
3
Determined by formula²
Determined by formula³
Determined by formula⁴
10 to 700
10
20
2694
779
214
139
−40
+85
5/PLL2_BW
512
Unit Test Conditions/Comments
MHz
MHz
MHz Recommended at high end of the range for best phase
noise; typically 122.88 MHz × 2
μA
ICP2 setting from 0 to 15 with 160 μA step size, VTUNE = 1.4 V
%
VTUNE = 1.4 V
%
Source/sink mismatch at 1.4 V
μA
V
ICP variation less than 10%
dBc/Hz
dBc/Hz
dB
dB
dBc/Hz
dBc/Hz
dBc/Hz
Normalized to 1 Hz
Normalized to 1 Hz
At minimum VCXO slew rate
At fOUT, fOFFSET
At fOUT, fPD2
kHz
Set by external components
ms
Time from power-up of VCO before initiating calibration;
this applies to the 100 nF/1 μF configuration of external
decoupling capacitors on the VCO supply network
tPD2
N2 from 8 to 31
tPD2
N2 from 32 to 256
tPD2
N2 from 256 to 4095
tPD2
N2 > 4095
°C
Maintains lock from any temperature to any temperature
sec
After VCXO has stopped slewing to steady state
tPD2
Low phase error counts to declare lock
1 _{Guaranteed by design and characterization.}
2 _{See the PLL2 Noise Calculations section for more information on how to calculate the flicker noise for PLL2.}
3 _{See the PLL2 Noise Calculations section for more information on how to calculate the noise floor for PLL2.}
4 _{See the PLL2 Noise Calculations section for more information on how to calculate the total phase noise (unfiltered) for PLL2.}
5 _{tPD2 is the period of Phase Detector 2.}
VCO CHARACTERISTICS
Table 6.
Parameter
VOLTAGE CONTROLLED OSCILLATOR (VCO)
Frequency Tuning Range, On-Board VCOs¹
Tuning Sensitivity
Min
2150
2650
2400
Typ
Max
38 to 44
35 to 40
2880
3550
3200
Unit Test Conditions/Comments
MHz
MHz
MHz
MHz/V
MHz/V
Low VCO typical coverage
High VCO typical coverage
Guaranteed frequency coverage²
Low frequency VCO at 2457.6 MHz
High frequency VCO at 2949.12 MHz
Rev. B | Page 8 of 72