HMC7044 Datasheet, PDF (62/72 Pages) Analog Devices – JESD204B clock generation

HMC7044
Data Sheet
Table 62. Analog Delay Common Control
Address Bits Bit Name
Settings
0x0065 [7:1] Reserved
0 Analog delay low
power mode
Description
Reserved.
Analog delay is in low power mode, which can save power for low settings of
analog delay, but is not glitchless between setpoints.
Access
RW
Alarm Masks Registers (Register 0x0070 to Register 0x0071)
Table 63. PLL1 Alarm Mask Control
Address Bits Bit Name
0x0070 7 PLL1 near lock mask
6 PLL1 lock acquisition mask
5 PLL1 lock detect mask
4 PLL1 holdover status mask
[3:0] PLL1 CLKINx/CLKINx Status
Mask[3:0]
Settings
Bit 0
Bit 1
Bit 2
Bit 3
Description
If set, allow the PLL1 near lock signal to generate alarm signal
If set, allow the PLL1 lock acquisition signal to generate alarm
signal
If set, allow the PLL1 lock detect signal to generate alarm
signal
If set, allow the PLL1 holdover status signal to generate alarm
signal
If set, allow CLKIN0/CLKIN0 LOS to generate alarm signal
If set, allow CLKIN1/CLKIN1 LOS to generate alarm signal
If set, allow CLKIN2/CLKIN2 LOS to generate alarm signal
If set, allow CLKIN3/CLKIN3 LOS to generate alarm signal
Access
RW
Table 64. Alarm Mask Control
Address Bits Bit Name
0x0071 [7:5] Reserved
4 Sync request mask
3 PLL1 and PLL2 lock detect mask
2 Clock outputs phases status
mask
1 SYSREF sync status mask
0 PLL2 lock detect mask
Settings
Description
Reserved
If set, allow the sync request signals to generate alarm signal
If set, allow the PLL1 and PLL2 lock detect signals to generate
alarm signal
If set, allow the clock outputs phases status signal to generate
alarm signal
If set, allow the SYSREF sync status signal to generate alarm
signal
If set, allow the PLL2 lock detect signal to generate alarm
signal
Access
RW
Product ID Registers (Register 0x0078 to Register 0x007A)
Table 65. Product ID
Address
Bits
0x0078
[7:0]
0x0079
[7:0]
0x007A
[7:0]
Bit Name
Product ID Value[7:0] (LSB)
Product ID Value[15:8] (Mid)
Product ID Value[23:16] (MSB)
Settings
Description
24-bit product ID value low
24-bit product ID value high
24-bit product ID value very high
Access
R
R
R
Alarm Readback Status Registers (Register 0x007B to Register 0x007F)
Table 66. Readback Register
Address
Bits
Bit Name
0x007B
[7:1]
Reserved
0
Alarm signal
Settings
Description
Reserved.
Readback alarm status from SPI.
Access
R
Rev. B | Page 62 of 72