HMC7044 Datasheet, PDF (43/72 Pages) Analog Devices – JESD204B clock generation

Data Sheet
HMC7044
APPLICATIONS INFORMATION
PLL1 NOISE CALCULATIONS
Use the following equations to calculate the flicker noise, noise
floor, and total unfiltered phase noise specifications for PLL1
(see Table 4).
Calculate the flicker noise using the following equation:
PN(fOUT, fOFFSET) = Flicker_FOM + 20 × log(fOUT) – 10 ×
log(fOFFSET)
(1)
where:
PN() is the phase noise.
fOUT is the output frequency.
fOFFSET is the offset of noise frequency from the output carrier
frequency.
Flicker_FOM is the figure of merit at the flicker frequency.
Calculate the noise floor as follows:
( ) PN f_OUT , f _PD1 =
Floor_ FOM
+ 20 × log_{}
f _OUT
f _PD1
 ^{−10 × log( fPD1 )}
(2)
where:
fPD1 is the phase detector frequency of PLL1.
Floor_FOM is the figure of merit at the floor frequency.
Calculate the total phase noise (unfiltered) as follows:
( ) PN f_OUT , f_PD1, f_OFFSET =

 ^{PN _ Flicker} ²
 ^{PN _ Floor} ² 
(3)
10 × log_ 10^{ 10 } +10^{ 10 } _




where:
PN_Flicker is the phase noise at the flicker frequency.
PN_Floor is the phase noise at the floor frequency.
PLL2 NOISE CALCULATIONS
Use the following equations to calculate the flicker noise, noise
floor, and total unfiltered phase noise specifications for PLL2
(see Table 5).
Calculate the flicker noise using the following equation:
PN(fOUT, fOFFSET) = Flicker_FOM + 20 × log(fOUT) – 10 ×
log(fOFFSET)
(4)
where:
fOUT is the output frequency.
fOFFSET is the offset of noise frequency from the output carrier
frequency.
Flicker_FOM is the figure of merit at the flicker frequency.
Calculate the noise floor as follows:
( ) PN
f_OUT , f _PD2
=
Floor_ FOM
+ 20 × log_{}
f _OUT
f _PD2
 ^{−10 ×}
log( f_PD2 )
(5)
where:
Floor_FOM is the figure of merit at the floor frequency.
fPD2 is the phase detector frequency of PLL2.
Calculate the total phase noise (unfiltered) as follows:
( ) PN f_OUT , f_PD2 , f_OFFSET =

 ^{PN _ Flicker} ²
 ^{PN _ Floor} ² 
(6)
10 × log_ 10^{ 10 } +10^{ 10 } _


where:
PN_Flicker is the phase noise at the flicker frequency.
PN_Floor is the phase noise at the floor frequency.
PHASE NOISE FLOOR AND JITTER
Use the following equations to calculate the phase noise floor,
jitter density, and rms additive jitter due to floor specifications
(see Table 9).
Calculate the phase noise floor using the following equation:
PNFLOOR = FOMOCHAN + 10 × log(fOUT) + Harmonic
Degradation + Power Degradation
(7)
where:
PNFLOOR is the phase noise floor at fOUT.
FOMOCHAN is the figure of merit of the output channel.
Harmonic Degradation is the harmonics of the signal captured
in the measurement bandwidth of the receiving
instrument/circuit. The noise power of those harmonics can
fold and influence the overall noise.
Power Degradation results when the noise floor (−174 dBm/Hz)
of the measurement system approaches the noise power in the
phase noise floor of the signal. For example, a phase noise value
of−155 dBc/Hz at 0 dBm carrier level is −155 dBm/Hz and is
easily measurable. If, however, the carrier level is −20 dBm, the
phase noise of –155 dBc/Hz is −175 dBm/Hz, and is not
measurable below the other noise sources in the system.
Calculate the jitter density at fOUT as follows:
 ^{PN floor 10} 


JITTER _ DENSITY _ FLOOR = 2 ×10^{ fOUT ×2π }
(8)
where JITTER_DENSITY_FLOOR is the jitter density of floor at
fOUT.
Calculate the rms additive jitter due to floor using the following
equation:
JITTER_RMS_FLOOR = JITTER_DENSITY_FLOOR ×
√Observation Bandwidth
(9)
where Observation Bandwidth is the desired integration
bandwidth of the noise with a lower and upper bound offset
from the output carrier frequency.
Rev. B | Page 43 of 72