HMC7044 Datasheet, PDF (49/72 Pages) Analog Devices – JESD204B clock generation

Data Sheet
Addr.
(Hex)
0x00D2
0x00D3
0x00D4
0x00D5
0x00D6
0x00D7
0x00D8
0x00D9
Register
Name
Channel
Output 1
control
0x00DA
0x00DB
0x00DC
0x00DD
0x00DE
0x00DF
0x00E0
0x00E1
0x00E2
0x00E3
Channel
Output 2
control
0x00E4
0x00E5
0x00E6
0x00E7
0x00E8
0x00E9
0x00EA
0x00EB
0x00EC
0x00ED
Channel
Output 3
control
0x00EE
0x00EF
0x00F0
0x00F1
0x00F2
0x00F3
0x00F4
0x00F5
0x00F6
0x00F7
Channel
Output 4
control
0x00F8
0x00F9
HMC7044
Bit 7 (MSB) Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
High
performance
mode
SYNC
enable
Slip enable Reserved
Start-Up Mode[1:0]
Multislip Channel
enable
enable
12-Bit Channel Divider[7:0] (LSB)
Reserved
12-Bit Channel Divider[11:8] (MSB)
Reserved
Fine Analog Delay[4:0]
Reserved
Coarse Digital Delay[4:0]
12-Bit Multislip Digital Delay[7:0] (LSB)
Reserved
12-Bit Multislip Digital Delay[11:8] (MSB)
Reserved
Output Mux
Selection[1:0]
Force Mute[1:0]
Dynamic
driver enable
Driver Mode[1:0]
Reserved Driver Impedance[1:0]
Reserved
High
performance
mode
SYNC
enable
Slip enable Reserved
Start-Up Mode[1:0]
Multislip Channel
enable
enable
12-Bit Channel Divider[7:0] (LSB)
Reserved
12-Bit Channel Divider[11:8] (MSB)
Reserved
Fine Analog Delay[4:0]
Reserved
Coarse Digital Delay[4:0]
12-Bit Multislip Digital Delay[7:0] (LSB)
Reserved
12-Bit Multislip Digital Delay[11:8] (MSB)
Reserved
Output Mux
Selection[1:0]
Force Mute[1:0]
Dynamic
driver enable
Driver Mode[1:0]
Reserved Driver Impedance[1:0]
Reserved
High
performance
mode
SYNC
enable
Slip enable Reserved
Start-Up Mode[1:0]
Multislip Channel
enable
enable
12-Bit Channel Divider[7:0] (LSB)
Reserved
12-Bit Channel Divider[11:8] (MSB)
Reserved
Fine Analog Delay[4:0]
Reserved
Coarse Digital Delay[4:0]
12-Bit Multislip Digital Delay[7:0] (LSB)
Reserved
12-Bit Multislip Digital Delay[11:8] (MSB)
Reserved
Output Mux
Selection[1:0]
Force Mute[1:0]
Dynamic
driver enable
Driver Mode[1:0]
Reserved Driver Impedance[1:0]
Reserved
High
performance
mode
SYNC
enable
Slip enable Reserved
Start-Up Mode[1:0]
Multislip Channel
enable
enable
12-Bit Channel Divider[7:0] (LSB)
Reserved
12-Bit Channel Divider[11:8] (MSB)
Reserved
Fine Analog Delay[4:0]
Reserved
Coarse Digital Delay[4:0]
12-Bit Multislip Digital Delay[7:0] (LSB)
Reserved
12-Bit Multislip Digital Delay[11:8] (MSB)
Reserved
Output Mux
Selection[1:0]
Force Mute[1:0]
Dynamic
driver enable
Driver Mode[1:0]
Reserved Driver Impedance[1:0]
Reserved
Default
Value
(Hex)
0xFD
0x00
0x01
0x00
0x00
0x00
0x00
0x00
0x30
0x00
0xF3
0x08
0x00
0x00
0x00
0x00
0x00
0x00
0x01
0x00
0xFD
0x00
0x01
0x00
0x00
0x00
0x00
0x00
0x30
0x00
0xF3
0x02
0x00
0x00
0x00
0x00
0x00
0x00
0x01
0x00
Rev. B | Page 49 of 72