HMC7044 Datasheet, PDF (56/72 Pages) Analog Devices – JESD204B clock generation

HMC7044
Data Sheet
Table 39. PLL1 PFD Control
Address Bits Bit Name
0x001B [7:5] Reserved
4
PLL1 PFD up enable
3
PLL1 PFD down enable
2
PLL1 PFD up force
1
PLL1 PFD down force
0
PLL1 PFD polarity
Settings
0
1
Description
Reserved
Enable PLL1 PFD up
Enable PLL1 PFD down
Force PLL1 charge pump up; do not assert simultaneously with PLL1
PFD down force
Force PLL1 charge pump down; do not assert simultaneously with PLL1
PFD up force
Select PFD polarity
Positive
Negative
Access
RW
Table 40. CLKINx/CLKINx and OSCIN/OSCIN Input Prescaler Control
Address
Bits Bit Name
Settings
0x001C
[7:0] CLKIN0/CLKIN0 Input Prescaler[7:0]
0x001D
[7:0] CLKIN1/CLKIN1 Input Prescaler[7:0]
0x001E
[7:0] CLKIN2/CLKIN2 Input Prescaler[7:0]
0x001F
[7:0] CLKIN3/CLKIN3 Input Prescaler[7:0]
0x0020
[7:0] OSCIN/OSCIN Input Prescaler[7:0]
Description
CLKIN0/CLKIN0 Prescaler divider setpoint
CLKIN1/CLKIN1 Prescaler divider setpoint
CLKIN2/CLKIN2 Prescaler divider setpoint
CLKIN3/CLKIN3 Prescaler divider setpoint
OSCIN/OSCIN Prescaler divider setpoint
Access
RW
RW
RW
RW
RW
Table 41. PLL1 Reference Divider Control (R1)
Address
Bits
Bit Name
0x0021
[7:0] 16-Bit R1 Divider[7:0] (LSB)
0x0022
[7:0] 16-Bit R1 Divider[15:8] (MSB)
Settings
Description
16-bit R1 divider setpoint LSB
16-bit R1 divider setpoint MSB
Access
RW
RW
Table 42. PLL1 Feedback Divider Control (N1)
Address
Bits
Bit Name
0x0026
[7:0] 16-Bit N1 Divider[7:0] (LSB)
0x0027
[7:0] 16-Bit N1 Divider[15:8] (MSB)
Settings
Description
16-bit N1 divider setpoint LSB
16-bit N1 divider setpoint MSB
Access
RW
RW
Table 43. PLL1 Lock Detect Control
Address Bits Bit Name
0x0028 [7:6] Reserved
5
PLL1 lock detect uses slip
[4:0] PLL1 Lock Detect Timer[4:0]
Settings
00000
00001
00010
…
11110
11111
Description
Reserved
Use the slip indicator instead of ~2 ns timer for lock detect
PLL1 lock detect center depth (LCMs); increments of
2^{PLL1 Lock Detect Timer[4:0]} cycles
1 cycle
2 cycles
4 cycles
…
1,073,741,824 cycles
2,147,483,648 cycles
Access
RW
Rev. B | Page 56 of 72