HMC7044 Datasheet, PDF (19/72 Pages) Analog Devices – JESD204B clock generation

Data Sheet
2.5
–40°C
+25°C
2.0
+85°C
1.5
1.0
0.5
0
100M
1G
3G
FREQUENCY (Hz)
Figure 15. LVPECL Differential Output Voltage vs. Frequency at Different
Temperatures
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
0
0.4
0.8
1.2
1.6
2.0
TIME (ns)
Figure 16. Differential CLKOUT0/CLKOUT0 at 2457 MHz, LVPECL
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0 1 2 3 4 5 6 7 8 9 10
TIME (ns)
Figure 17. Differential CLKOUT0/CLKOUT0 Voltage at 614.4 MHz, LVPECL
HMC7044
30
25
20
–40°C
+25°C
+85°C
15
10
DELAY STEP
Figure 18. Analog Delay Step Size vs. Delay Step over Temperature, LVPECL
at 1474.56 MHz
800
700
600
500
400
300
200
100
0
–100
–200
–40°C
+25°C
+85°C
FUND: FUNDAMENTAL MODE AT 2949MHz
DIS: ANALOG DELAY IS DISABLED AT 1474MHz
DELAY SETTING
Figure 19. Analog Delay vs. Delay Setting over Temperature, LVPECL
at 1474.56 MHz
30
25
20
15
10
–40°C
+25°C
5
+85°C
0
DELAY STEP
Figure 20. Analog Delay Step Size vs Delay Step over Temperature, LVPECL
at 3072 MHz with Digital Delay = 0
Rev. B | Page 19 of 72