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TLK6002 Datasheet, PDF (67/96 Pages) Texas Instruments – Dual Channel 0.47Gbps to 6.25Gbps Multi-Rate Transceiver
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TLK6002
SLLSE34 – MAY 2010
+ 600 mV
+ A2
+ 400 mV
+ A1
0V
0
- 400 mV
- 600 mV
- A1
- A2
0
0 .15 0 .4
0 .6 0 .85
1
0
X 1 X2
1-X2 1 -X1
1
Figure 4-6. OBSAI 6.144 Gbps and CPRI (LV-II) (All Rates) TX Output Mask
Note: Due to process variation, the output mask cannot always be achieved with a common setting for all
devices. However, for a given device, a particular swing setting will pass output mask requirements.
4.9 Serial Receiver Characteristics
PARAMETER
VID
VID(pp)
CI
JTOL
RX input differential voltage|RXP – RXN|
RX input differential peak-to-peak voltage
swing
2×|RXP – RXN|
RX input capacitance
Jitter Tolerance, Total Jitter at Serial Input
(DJ + RJ)(BER 10-15)
JDR
Serial Input Deterministic Jitter(BER 10-15)
T(LATENCY) Receive Latency
CONDITION
Full Rate AC Coupled
Half/Quarter/Eighth Rate AC Coupled
Full Rate AC Coupled
Half/Quarter/Eighth Rate AC Coupled
Zero crossing Half/Quarter/Eighth Rate
Zero crossing Full Rate
Zero crossing Half/Quarter/Eighth Rate
Zero crossing Full Rate
See latency specifications in Appendix D
MIN NOM MAX UNIT
50
600 mV
50
800
100
1200
100
1600 mVdfpp
2 pF
0.66 UIp-p
0.65
0.50
0.35
–
–
– Bit
Times
+ 800 mV
+ 100 mV
0V
- 100 mV
+ A2
+ A1
0
- A1
- 800 mV
- A2
0
0 .275 0 .4 0.6 0 .725
1
0
X X 2 1-X2 1-X1
1
Figure 4-7. CPRI LV Receiver Mask for E.6/12/24/30.LV (0.6144/1.2288/2.4576/3.072 Gbps)
Copyright © 2010, Texas Instruments Incorporated
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ELECTRICAL SPECIFICATIONS
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