TLK6002 Datasheet, PDF (61/96 Pages) Texas Instruments – Dual Channel 0.47Gbps to 6.25Gbps Multi-Rate Transceiver

TLK6002
www.ti.com
Address: 0x8006
BIT(s) NAME
32774.15:0 RESERVED
Table 3-43. TI_RESERVED_STATUS_10
For TI use only.
Default: 0x0000
DESCRIPTION
SLLSE34 – MAY 2010
ACCESS
RO
Address: 0x8007
BIT(s) NAME
32775.15:0 RESERVED
Table 3-44. TI_RESERVED_STATUS_11
For TI use only.
Default: 0x0000
DESCRIPTION
ACCESS
RO
3.1 LL = Latched Low
Latched low means that if a condition is occurring, the register bit will read low. Latched low also means
that if a condition has occurred since the last time the register was read, it will read low. If a latched low
register bit reads high, it means that the condition is not occurring presently, and it has not occurred since
the last time the register was read. A latched low register, when read low, should be read again to
distinguish if a condition occurred previously or is still occurring. If it occurred previously, the second read
will read high. If it is still occurring, the second read will read low.
3.2 LH = Latched High
Latched high means that if a condition is occurring, the register bit will read high. Latched high also means
that if a condition has occurred since the last time the register was read, it will read high. If a latched high
register bit reads low, it means that the condition is not occurring presently, and it has not occurred since
the last time the register was read. A latched high register, when read high, should be read again to
distinguish if a condition occurred previously or is still occurring. If it occurred previously, the second read
will read low. If it is still occurring, the second read will read high.
3.3 COR = Clear On Read
Counters indicated as COR are cleared after being read.
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