TLK6002 Datasheet, PDF (20/96 Pages) Texas Instruments – Dual Channel 0.47Gbps to 6.25Gbps Multi-Rate Transceiver

TLK6002
SLLSE34 – MAY 2010
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2.5 16-bit SDR (Single Data Rate) Mode (8b/10b Encoder/Decoder Enabled)
Channel A TX: TDA_[18:10,8:0] → TXAP/N (Using TXCLK_A). RX: RXAP/N → RDA_[19:0] (Using
RXCLK_A).
Channel B TX: TDB_[18:10,8:0] → TXBP/N (Using TXCLK_B). RX: RXBP/N → RDB_[19:0] (Using
RXCLK_B).
The 16 Bits (two symbols) of unencoded (TX) or decoded (RX) data are transferred per parallel interface
clock cycle. Symbols are defined by a group of 9 parallel bits comprising of a K character control bit and a
byte of data (plus a high true disparity error or invalid symbol bit in RX only on RD*_[19] and RD*_[9]).
Please note that four symbols are shown in Figure 2-1: Data0[18:10]={Control Bit, Data[7:0]}, Data0[8:0]
={Control Bit, Data[7:0]}, Data1[18:10] ={Control Bit, Data[7:0]}, Data1[8:0] ={Control Bit, Data[7:0]}.
TXDA_[19], TXDA_[9], TXDB_[19], and TXDB_[9] are unused, and should be grounded in this application
mode. See Appendix C for a full list of control characters supported in the 8b/10b encoder/decoder.
Symbol Transmission Order:
When 3.5/3.4 = 0: Data0[18:10] is the first encoded transmitted or decoded received symbol. Data0[8:0] is
next, followed by Data1[18:10].
When 3.5/3.4 = 1: Data0[8:0] is the first encoded transmitted or decoded received symbol. Data0[18:10] is
next, followed by Data1[8:0].
Bit Transmission Order within a Symbol:
Control Character Bits are always on TD*_[18], TD*_ [8], RD*_[18], RD*_[8]
Data bytes are always on TD*_[17:10], TD*_[7:0], RD*_[17:10], RD*_[7:0].
The most significant bit of the data byte is always on TD*_[17], TD*_[7], RD*_[17], RD*_[7], and is bit "H"
in Figure 2-2.
When 8.3/8.2 = 1, The "a" bit in Figure 2-2 is serially transmitted first or received first (typical case, shown
below) per symbol.
When 8.3/8.2 = 0, The "j" bit in Figure 2-2 is serially transmitted first or received first (atypical case,
reverse from order Figure 2-2) per symbol.
Figure 2-2. 16-bit SDR Parallel Interface Mode (Serial Bit Order)
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