TLK6002 Datasheet, PDF (36/96 Pages) Texas Instruments – Dual Channel 0.47Gbps to 6.25Gbps Multi-Rate Transceiver

TLK6002
SLLSE34 – MAY 2010
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If supplying reference clock through an external clock jitter cleaning device, the VCXO used with the
external cleaning device should be chosen such that REFCLK maintains ±100 ppm accuracy during ARS
rate determination, since CLK_OUT behavior will not be deterministic during changes between settings.
Per the above table, note that CLK_OUT is always a fixed frequency and attempts to remain synchronous
(0 ppm) to the incoming serial data rate.
If reference clock of 153.6 MHz is selected, and an external clock jitter cleaning device is used, the clock
cleaning device will need to be configured to multiply the output clock by 1x, since CLK_OUT_P/N is
153.6MHz.
If reference clock of 122.88 MHz is selected, and an external clock jitter cleaning device is used, the clock
cleaning device will need to be configured to multiply the output clock by 2x, since CLK_OUT_P/N is
61.44MHz.
If reference clock of 307.2 MHz is selected, and an external clock jitter cleaning device is used, the clock
cleaning device will need to be configured to multiply the output clock by 2x, since CLK_OUT_P/N is
153.6MHz.
Figure 2-13 shows the flow of the ARS state machine:
36
Description
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