M16C1N Datasheet, PDF (85/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
12. Timers
12.2 Timer X
Timer X is an 8-bit timer with an 8-bit prescaler.
Timer X has the five operation modes listed as follows:
• Timer mode:
The timer counts an internal count source (clock source).
• Pulse output mode:
The timer counts an internal count source and outputs the pulses
whose polarity is inverted at the timer the timer underflows.
• Event counter mode:
The timer counts pulses from an external source.
• Pulse width measurement mode: The timer measures an external pulse's pulse width.
• Pulse period measurement mode: The timer measures an external pulse's period.
Figure 12.3 shows the block diagram of Timer X. Figures 12.4 and 12.5 shows the Timer X-related
registers.
Clock source
selection
f1
f8
f32
fC32
CNTR0
Polarity
switching
Pulse output
TXOUT
P30/TXOUT select bit
Timer
Pulse period
measurement
Pulse output
Peripheral data bus
Reload register (8)
Reload register (8)
Pulse width
measurement
Counter (8)
fPX
Counter (8)
Event counter
Timer X count
start flag
Prescaler X (address 008C16)
Timer X (address 008D16)
"1"
Q
Toggle flip-flop T
Q
R
"0"
CNTR0 polarity
switching bit
Timer X latch write
Pulse output mode
Figure 12.3 Block diagram of Timer X
Timer X interrupt
request bit
CNTR0 interrupt
request bit
Timer X mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TXMR
Address
008B16
When reset
0016
Bit symbol
Bit name
Function
RW
TXMOD0
Operation mode
select bit 0, 1
b1 b0
0 0 : Timer mode or
pulse period measurement mode
RW
(Note 2) _{0 1 : Pulse output mode (Note 1)}
TXMOD1
1 0 : Event counter mode
RW
1 1 : Pulse width measurement mode
R0EDG
CNTR0 polarity
0 : Rising edge
switching bit (Note 2) 1 : Falling edge
RW
TXS
Timer X count
0 : Stops counting
start flag
1 : Starts counting
RW
TXOCNT
P30/TXOUT
select bit
Function varies with each operation mode
RW
TXMOD2
Operation mode
select bit 2
0 : Except in pulse period measurement mode
1 : Pulse period measurement mode
RW
TXEDG
Effectual edge
Function varies with each operation mode
reception flag (Note 3)
RW
TXUND
Timer X under flow Function varies with each operation mode
flag (Note 3)
RW
Note 1: In the pulse output mode, the direction register of port P17 should be set to input.
Note 2: This bit should rewrite with inhibiting the CNTR0 interrupt. To use all interrupt, enable an interrupt after the CNTR0
interrupt request bit is cleared with the MOV instruction.
Note 3: Nothing is assigned to the pod probe for M16C/1N group (M301N2T-PRB).
Figure 12.4 Timer X-related registers (1)
Rev.1.00 Oct 20, 2004 page 73 of 222
REJ09B0007-0100Z