M16C1N Datasheet, PDF (194/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
19. Flash Memory Version
Flash memory control register 1
b7 b6 b5 b4 b3 b2 b1 b0
0 00
Symbol
FMR1
Address
01B516
After reset
0000XX0X2
Bit symbol
Bit name
Function
RW
(b0)
FMR11
(b3-b2)
Reserved bit
EW1 mode select bit
(Note 1)
Reserved bit
The value in this bit when read is
indeterminate.
RO
0 : EW0 mode
1 : EW1 mode
RW
The value in this bit when read is
indeterminate.
RO
(b5-b4) ^{Reserved bit}
Set to "0"
RW
FMR16 Block 0-3 rewrite enable bit 0 : Disables rewriting
(Note 2)
1 : Enables rewriting
RW
(b7)
Reserved bit
Set to "0"
RW
Note 1: When setting this bit to "1", write a "0" and then a "1" in succession while the FMR01 bit is "1". Make sure no
interrupts will occur before completion of these two write operations.
The FMR01 and FMR11 bits both are cleared to "0" by setting the FMR01 bit to "0".
Note 2: When setting this bit to "1", write a "0" and then a "1" to it in succession while the FMR01 bit is "1". Make sure
no interrupts will occur before completion of these two write operations.
Flash memory control register 4
b7 b6 b5 b4 b3 b2 b1 b0
0 0000
Symbol
FMR4
Address
01B316
After reset
010000002
Bit symbol
Bit name
Function
RW
FMR40 Suspend enable bit (Note 1) 0 : Invalid
1 : Valid
RW
FMR41 Suspend request bit (Note 2) 0 : Erase restart
1 : Suspend request
RW
(b5-b2) ^{Reserved bits}
Set to "0"
RO
FMR46 Suspend status
0 : Erase active
1 : Erase inactive
RO
(erasure-suspend)
(b7)
Reserved bit
Set to "0"
RW
Note 1: When setting this bit to "1", write a "0" and then a "1" to it in succession. Make sure no interrupts will occur
before completion of these two write operations.
Note 2: This bit is valid only when the FMR40 bit is "1" and can be written in only the period from issuing an erase
command until completion of erasing.
• In EW0 mode, this bit can be set to "0" or "1" by program.
• In EW1 mode, this bit is automatically set to "1" when a maskable interrupt occurs during erasure execution
while the FMR40 bit is "1". It can not be set to "1" by program. (Writing "0" is available.)
Figure 19.5 FMR1 Register, FMR4 Register
Rev.1.00 Oct 20, 2004 page 182 of 222
REJ09B0007-0100Z