M16C1N Datasheet, PDF (157/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
16. CAN Module
16.5.2 CAN Operation Mode
CAN operation mode is activated by setting the Reset bit of the C0CTLR register to “0”. When setting
the Reset bit to "0", check that the State_reset bit of C0STR register is set to "0". In CAN operation
mode, the CAN module becomes the following status after having detected 11 consecutive recessive
bits on the bus.
• The module's communication functions are released and it becomes an active node on the net-
work and may transmit and receive CAN messages.
• Release the internal fault confinement logic including receive and transmit error counters. The
module may leave CAN operation mode depending on the error counts.
Within CAN operation mode, the module may be in three different sub modes, depending on which
type of communication functions are performed:
• Module idle: The modules receive and transmit sections are inactive.
• Module receives: The module receives a CAN message sent by another node.
• Module transmits: The module transmits a CAN message. The module may receive its own
message simultaneously when the looback function is enabled.
Figure 16.17 shows sub modes of CAN operation mode.
Transmission
start
Transmission
finished
Module idle
TrmState = 0
RecState = 0
Module transmits
TrmState = 1
RecState = 0
Lost in arbitration
A SOF
detected
Reception
finished
Module receives
TrmState = 0
RecState = 1
TrmState, RecState : C0STR register’s bit
Figure 16.17 Sub Modes of CAN Operation Mode
16.5.3 CAN Sleep Mode
CAN sleep mode is activated by setting the Sleep bit of the C0CTLR register to “1” and Reset bit to “0”.
It should never be activated from CAN operation mode but only via CAN reset/initialization mode.
Entering CAN sleep mode instantly stops the modules clock supply and thereby reduces power dissi-
pation.
16.5.4 Bus Off State
The bus off sate is entered according to the fault confinement rules of the CAN specification. When
returning to CAN operation mode from the bus off state, the module has the following two cases.
In this time, the value of any CAN registers, except C0STR, C0RECR and C0TECR registers, does
not change.
(1) When 11 consecutive recessive bits are monitored 128 times
The module enters instantly into error active state and the CAN communication becomes possible
immediately.
(2) When the RetBus Off bit in the CiCTLR register = 1 (Force return form buss off)
The module enters instantly into error active state, and the CAN communication becomes pos-
sible again after 11 consecutive recessive bits are monitored.
Rev.1.00 Oct 20, 2004 page 145 of 222
REJ09B0007-0100Z