M16C1N Datasheet, PDF (56/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
10. Interrupt
10.1 Overview of Interrupt
10.1.1 Type of Interrupts
Figure 10.1 lists the types of interrupts.
10. Interrupt
Software
(Non-maskable interrupt)
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
______
INT instruction
Interrupt
Hardware
Special
(Non-maskable
interrupt)
Reset
UART0 reception
________
DBC
Oscillation stop detection/watchdog timer
Single step
Address matched
Peripheral I/O (Note 1)
Note 1: Peripheral I/O interrupts are generated by the peripheral functions built into the microcomputer
system.
Figure 10.1 Classification of interrupts
• Maskable interrupt
: An interrupt which can be enabled (disabled) by the interrupt enable flag
(I flag) or whose interrupt priority can be changed by priority level.
• Non-maskable interrupt : An interrupt which cannot be enabled (disabled) by the interrupt enable flag
(I flag) or whose interrupt priority cannot be changed by priority level.
Rev.1.00 Oct 20, 2004 page 44 of 222
REJ09B0007-0100Z