M16C1N Datasheet, PDF (149/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
16.4.2 C0CTLR Register
Figures 16.7 shows the C0CTLR register.
16. CAN Module
CAN0 control register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
C0CTLR
Address
023016
After reset
X00000012
Bit symbol
Bit name
Function
RW
Reset
CAN module
0 : Operation mode
reset bit (Note 2) _{1 : Reset/initialization mode}
RW
LoopBack Loop back mode
0 : Normal operation mode
select bit (Note 3) _{1 : Loop back mode}
RW
MsgOrder Message order
0 : Word access
select bit (Note 3) _{1 : Byte access}
RW
BasicCAN Basic CAN mode 0 : Normal operation mode
select bit (Note 3) _{1 : Basic CAN mode}
RW
BusErrEn Bus error interrupt 0 : Bus error interrupt disabled
enable bit (Note 3) _{1 : Bus error interrupt enabled}
RW
Sleep
Sleep mode
0 : Sleep mode disabled
select bit (Note 3, 4) 1 : Sleep mode enabled; clock supply stopped
RW
PortEn
CAN port enable bit 0 : I/O port function
1 : CTx/CRx function (Note 1)
RW
-
Nothing is assigned. When write, set to "0".
(b7)
When read, its content is indeterminate.
-
Note 1: Irrespective of setting of PD0 and PD5 registers.
Note 2: When the Reset bit is set to "1" (CAN reset/initialization mode), check that the State_Reset bit of the C0STR register is set to "1" (Reset
mode).
Note 3: Set these bits only in CAN reset/initialization mode.
Note 4: When using CAN0 wake up interrupt, set this bit to "1" (Sleep mode disabled).
(b15)
(b8)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
C0CTLR
Address
023116
After reset
XX0X00002
Bit symbol
Bit name
Function
RW
Time stamp
b1 b0
Bit1, Bit0 _{prescaler (Note 3)} ^{0 0 : Period of 1 bit time}
0 1 : Period of 1/2 bit time
RW
1 0 : Period of 1/4 bit time
1 1 : Period of 1/8 bit time
TSReset Time stamp counter 0 : Normal operation mode
reset bit (Note 1) 1 : Force reset of the time stamp counter
RW
RetBusOff Return from bus off 0 : Normal operation mode
command bit
1 : Force return from bus off
RW
(Note 2)
-
Nothing is assigned. When write, set to "0".
-
(b4)
When read, its content is indeterminate.
RXOnly
Listen-only mode 0 : Normal operation mode
select bit (Note 3) 1 : Listen-only mode (Note 4)
RW
-
Nothing is assigned. When write, set to "0".
(b7-b6)
When read, its content is indeterminate.
-
Note 1: When the TSReset bit = 1, the C0TSR register is set to "000016". After this, the bit is automatically set to "0".
Note 2: When the RetBusOff bit = 1, the C0RECR register and the C0TECR register are set to "0016". After this, the bit is automatically set to "0".
Note 3: Set these bits only in CAN reset/initialization mode.
Note 4: When listen-only mode is selected, do not request a transmission.
Figure 16.7 C0CTLR Register
Rev.1.00 Oct 20, 2004 page 137 of 222
REJ09B0007-0100Z