M16C1N Datasheet, PDF (217/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
20. Precautionary Notes in Using the Device
20.1.3 Stop and Wait Modes
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1. When returning from a stop mode by hardware reset, RESET pin must be "L" level until the main-
clock has stabilized.
2. When switching to a stop or wait mode, 4 instructions are prefetched after the stop or wait instruc-
tion. And so, ensure that at least 4 NOPs follow the stop (the all-clock stop bit to "1") or wait
instruction.
3. A Stop or wait mode is cancelled by a hardware reset or an interrupt. If an interrupt is to be used to
cancel a stop or wait mode, that interrupt must first have been enabled, and the priority level of the
interrupt which is not used to cancel must have been changed to 0 before shifting to either mode.
If only a hardware reset is used to cancel a stop or wait mode, change the priority level of all
interrupt to 0, then shift to either mode.
Example 1. When an interrupt is used to cancel wait mode
When canceling wait mode by a hardware reset and an INT0 interrupt.
Set the interrupt enable flag (I flag) to "0" ; Disable interrupt
Change the INT0 interrupt priority level to 1 or higher ; Enable INT0 interrupt
In case of processor interrupt priority level = 0
Change all other interrupt priority level to 0 ; Disable all other interrupts
Insert 4 NOPs instructions
; Prevent irregular interrupt occurring
Set the interrupt enable flag (I flag) to "1" ; Enable interrupts
WAIT instruction
Insert 4 NOPs instructions
; Put at least 4 NOPs after a wait instruction because
when switching to a wait mode, 4 instructions are
prefetched after the wait instruction.
Example 2. When only hardware reset is used to cancel wait mode
Set the interrupt enable flag (I flag) to "0" ; Disable interrupt
Change all interrupt priority level to 0 ; Disable maskable interrupt
WAIT instruction
Insert 4 NOPs instructions
; Put at least 4 NOPs after a wait instruction because
when switching to a wait mode, 4 instructions are
prefetched after the wait instruction.
Rev.1.00 Oct 20, 2004 page 205 of 222
REJ090007-0100Z