M16C1N Datasheet, PDF (124/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
13. Serial I/O
UARTi transmit/receive control register 1
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UiC1(i=0,1)
Address
00A516, 00AD16
When reset
XXXX00102
Bit
symbol
Bit name
Function
Function
(During clock synchronous serial I/O mode) (During UART mode)
RW
TE Transmit enable bit
0 : Transmission disabled 0 : Transmission disabled
1 : Transmission enabled 1 : Transmission enabled
RW
TI
Transmit buffer
empty flag
RE Receive enable bit
(Note 1)
0 : Data present in transmit 0 : Data present in transmit
buffer register
buffer register
1 : No data present in
1 : No data present in
RO
transmit buffer register
transmit buffer register
0 : Reception disabled
0 : Reception disabled
1 : Reception enabled
1 : Reception enabled
RW
RI
Receive complete flag 0 : No data present in
0 : No data present in
receive buffer register
receive buffer register
1 : Data present in receive 1 : Data present in receive
RO
buffer register
buffer register
Nothing is assigned.
In an attempt to write to these bits, write "0". The value, if read, turns out to be "0".
Note 1: As for the UART1, set the RXD1 input port select bit before setting this bit to reception enabled.
UART transmit/receive control register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UCON
Address
00B016
When reset
0016
Bit
symbol
Bit name
Function
Function
(During clock synchronous serial I/O mode) (During UART mode)
RW
U0IRS
UART0 transmit
0 : Transmit buffer empty 0 : Transmit buffer empty
interrupt cause select bit
(Tl = 1)
(Tl = 1)
1 : Transmission completed 1 : Transmission completed
RW
(TXEPT = 1)
(TXEPT = 1)
U1IRS
UART1 transmit
0 : Transmit buffer empty 0 : Transmit buffer empty
interrupt cause select bit
(Tl = 1)
(Tl = 1)
1 : Transmission completed 1 : Transmission completed
RW
(TXEPT = 1)
(TXEPT = 1)
U0RRM UART0 continuous
0 : Continuous receive
Invalid
receive mode enable bit
mode disabled
1 : Continuous receive
RW
mode enable
U1RRM UART1 continuous
0 : Continuous receive
Invalid
receive mode enable bit
mode disabled
1 : Continuous receive
RW
mode enable
CLKMD0 CLK/CLKS select bit 0 Valid when bit 5 = "1"
Invalid
0 : Clock output to CLK1
RW
1 : Clock output to CLKS1
CLKMD1 CLK/CLKS select
0 : Normal mode
Set to "0"
bit 1 (Note 1)
(CLK output is CLK0 only)
1 : Transfer clock output
RW
from multiple pins
function selected
RXD1EN RXD1 input port
0 : P37
0 : P37
select bit (Note 2)
1 : P35
1 : P35
RW
Nothing is assigned.
In an attempt to write to these bits, write "0". The value, if read, turns out to be "0".
Note 1: When using multiple pins to output the transfer clock, the following requirements must be met:
UART1 internal/external clock select bit (bit 3 at address 00A816) = "0".
Note 2: For P37, select "0" for data receive, and "1" for data transfer.
And set the direction register of port P37 to input ("0") when receiving.
Figure 13.5 Serial I/O-related registers (3)
Rev.1.00 Oct 20, 2004 page 112 of 222
REJ09B0007-0100Z