M16C1N Datasheet, PDF (227/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
20. Precautionary Notes in Using the Device
fCAN
CPU read signal
Updating period of
CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
mode
1: CAN reset/initial-
ization mode
: When the CAN module’s State_Reset bit updating period matches the CPU’s
read period, it does not enter reset mode, for the CPU read has the higher
priority.
Figure 20.2 When Updating Period of CAN Module Matches Access Period from CPU
CPU read signal
Wait time
Updating period of
CAN module
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
mode
1: CAN reset/initial-
ization mode
: Updated without fail in period of 3fCAN
Figure 20.3 With a Wait Time of 3fCAN Before CPU Read
CPU read signal
Updating period of
CAN module
4fCAN
CPU reset signal
C0STR register
b8: State_Reset bit
0: CAN operation
mode
1: CAN reset/initial-
ization mode
: When the CAN module’s State_Reset bit updating period matches the CPU’s
read period, it does not enter reset mode, for the CPU read has the higher
priority.
: Updated without fail in period of 4fCAN
Figure 20.4 When Polling Period of CPU is 3fCAN or Longer
Rev.1.00 Oct 20, 2004 page 215 of 222
REJ090007-0100Z