M16C1N Datasheet, PDF (187/238 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/10 SERIES

M16C/1N Group
19. Flash Memory Version
19.3 Functions to Inhibit Rewriting Flash Memory Version
To prevent the flash memory from being read or rewritten easily, parallel I/O mode has a ROM code
protect and standard serial I/O and CAN I/O modes have an ID code check function.
19.3.1 ROM code protect function
The ROM code protect function inhibits the flash memory from being read or rewritten during parallel
I/O mode. Figure 19.2 shows the ROMCP register.
The ROMCP register is located in the user ROM area. The ROMCP1 bit consists of two bits. The ROM
code protect function is enabled by clearing one or both of two ROMCP1 bits to "0" when the ROMCR
bits are not '002,' with the flash memory thereby protected against reading or rewriting. Conversely,
when the ROMCR bits are '002' (ROM code protect removed), the flash memory can be read or
rewritten. Once the ROM code protect function is enabled, the ROMCR bits cannot be changed during
parallel I/O mode. Therefore, use standard serial I/O or other modes to rewrite the flash memory.
19.3.2 ID code check function
Use this function in standard serial I/O and CAN I/O modes. Unless the flash memory is blank, the ID
codes sent from the programmer and the ID codes written in the flash memory are compared to see if
they match. If the ID codes do not match, the commands sent from the programmer are not accepted.
The ID code consists of 8-bit data, the areas of which, beginning with the first byte, are 0FFFDF16,
0FFFE316, 0FFFEB16, 0FFFEF16, 0FFFF316, 0FFFF716, and 0FFFFB16. Prepare a program in which
the ID codes are preset at these addresses and write it in the flash memory.
Figure 19.3 shows ID code store addresses.
Rev.1.00 Oct 20, 2004 page 175 of 222
REJ09B0007-0100Z