MC68HC05L28 Datasheet, PDF (99/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

9.2 A/D registers
9.2.1 A/D status/control register (ADSTAT)
Address bit 7 bit 6 bit 5
A/D status/control register (ADSTAT) $0015 COCO ADRC ADON
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
CH3 CH2 CH1 CH0 0000 0000
9.2.1.1 COCO — Conversion complete flag
1 (set)
– COCO flag is set each time a conversion is complete, allowing the
new result to be read from the A/D result data register ($16). The
converter then starts a new conversion.
0 (clear) – COCO is cleared by reading the result data register or writing to the
status/control register.
Reset clears the COCO flag.
9.2.1.2 ADRC — A/D RC oscillator control
The ADRC bit allows the user to control the A/D RC oscillator, which is used to provide a
sufficiently high clock rate to the A/D to ensure accuracy when the chip is running at low speeds.
1 (set) – When the ADRC bit is set, the A/D RC oscillator is turned on and, if
9
ADON is set, the A/D runs from the RC oscillator clock. See Table 9-1.
0 (clear) – When the ADRC bit is cleared, the A/D RC oscillator is turned-off
and, if ADON is set, the A/D runs from the CPU clock.
When the A/D RC oscillator is turned on, it takes time t_ADRC to stabilize (see Section 12.4). During
this time A/D conversion results may be inaccurate.
Power-on or external reset clears the ADRC bit.
9.2.1.3 ADON — A/D converter on
The ADON bit allows the user to enable/disable the A/D converter.
1 (set) – A/D converter is switched on.
0 (clear) – A/D converter is switched off.
When the A/D converter is switched on, it takes time t_ADON for the current sources to stabilize (see
Section 12.4). During this time A/D conversion results may be inaccurate.
MC68HC05L28
A/D CONVERTER
TPG
MOTOROLA
9-3