MC68HC05L28 Datasheet, PDF (47/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

4.4.1 Port data registers (PORTA, PORTB and PORTD)
Port A data (PORTA)
Port B data (PORTB)
Port D data (PORTD)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0000
Unaffected
$0001
Unaffected
$0030
Unaffected
Each bit can be configured as input or output via the corresponding data direction bit in the port
4
data direction register (DDRx).
Reset does not affect the state of the port data registers.
Each of the port D bits is shared with another MCU subsystem. The configuration of this register
is determined by the setting of individual bits in the port D control register. See Section 4.4.3.
4.4.2 Data direction registers (DDRA, DDRB and DDRD)
Port A data direction (DDRA)
Port B data direction (DDRB)
Port D data direction (DDRD)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0004
0000 0000
$0005
0000 0000
$0031
0000 0000
Writing a ‘1’ to any bit configures the corresponding port pin as an output; conversely, writing any
bit to ‘0’ configures the corresponding port pin as an input.
Reset clears these registers, thus configuring all ports as inputs.
4.4.3 Port D control register (COND)
Port D control (COND)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0032
0000 0000
The select register, data direction register and control register determine the function of the I/O
port, as shown in Table 4-2.
MC68HC05L28
INPUT/OUTPUT PORTS
TPG
MOTOROLA
4-3