MC68HC05L28 Datasheet, PDF (38/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

$0000
I/O
(64 bytes)
$0040
3
LCD RAM
(12 bytes)
$004C
$0080
Reserved
$00C0
$00FF ^Stack
RAM
(256 bytes)
$0180
$0300
Reserved
EEPROM
(240 bytes)
$03F0
$1000
$2FC0/ $2FF0
Reserved
User ROM
(8176 bytes)
User EPROM
(8128bytes)
Reserved
$3F00
$3FF0
$3FFF
Bootstrap ROM
(240 bytes)
& bootstrap vectors
User vectors
(16 bytes)
Registers
Port A data (PORTA)
Port A data (PORTA)
Reserved
Reserved
Port A data direction (DDRA)
Port B data direction (DDRB)
Reserved
Reserved
Core timer control & status (CTCSR)
Core timer counter (CTCR)
IRQ1
IRQ2
Reserved
I²C address (MADR)
I²C frequency divider (MFDR)
I²C control (MBCR)
I²C status (MBSR)
I²C data (MDR)
A/D status/control (ADSTAT)
A/D Input (ADIN)
A/D data (ADDATA)
Reserved
EEPROM program (EEPROG)
EPROM program (PCR)
Option (OPT)
LCD control (LCD)
Reserved
Input capture 1 high(IC1H)
Input capture 1 low (IC1L)
Output compare 1 high (OC1H)
Output compare 1 low (OC1L)
Input capture 2 high (IC2H)
Input capture 2 low (IC2L)
Output compare 2 high (OC2H)
Output compare 2 low (OC2L)
Timer counter high (TCH)
Timer counter low (TCL)
Alternate counter high (ACH)
Alternate counter low (ACL)
Timer control 1 (TCR1)
Timer control 2(TCR2)
Timer status (TSR)
Reserved
Port D data (PORTD)
Port D Data direction (DDRD)
Port D control (COND)
Port D select (SELD)
Reserved
$00
$01
$02
$03
$04
$05
$06
$07
$08
$09
$0A
$0B
$0C
$0F
$10
$11
$12
$13
$14
$15
$16
$17
$18
$1A
$1B
$1C
$1D
$1E
$1F
$20
$21
$22
$23
$24
$25
$26
$27
$28
$29
$2A
$2B
$2C
$2D
$2E
$2F
$30
$31
$32
$33
$34
$3F
Figure 3-1 Memory map of the MC68HC05L28 and MC68HC705L28
MOTOROLA
3-2
MEMORY AND REGISTERS
TPG
MC68HC05L28