MC68HC05L28 Datasheet, PDF (82/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

8.2 I²C-bus system configuration
The I²C-bus system uses a serial data line and a serial clock line for data transfer. All the devices
connected to it must have open drain or open collector outputs. A logic ‘AND’ function is used on
both lines with two pull-up resistors.
8.3 I²C-bus protocol
A standard communication is normally composed of four parts: START signal, slave address
transmission, data transfer, and STOP signal. These signals are described in the following sections
and illustrated in Figure 8-1.
8.3.1 START signal
When the bus is free (no master device engaging the bus; SCL and SDA lines at a logic high), a
master may initiate communication by sending a START signal, which is defined as being a high
to low transition of SDA with SCL high. This signal denotes the beginning of a new data transfer
(each data transfer may contain several bytes of data) and wakes up all slaves.
8
8.3.2 Transmission of the slave address
The first byte of data transferred after the START signal is the slave address transmitted by the
master. This address is seven bits long, followed by a R/W bit which tells the slave the desired
direction of transfer of all the following bytes (until a STOP or repeated start).
Only the slave with the calling address that matches the one transmitted by the master responds
by sending back an acknowledge bit. This is done by pulling the SDA low at the ninth clock (see
Figure 8-1).
MOTOROLA
8-2
I²C-BUS
TPG
MC68HC05L28