MC68HC05L28 Datasheet, PDF (45/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

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INPUT/OUTPUT PORTS
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In single chip mode, the MC68HC05L28 has a total of 22 I/O lines, arranged as two 8-bit ports (A
and B) and one 6-bit port (D). Each I/O line is individually programmable as either input or output,
under the software control of the data direction registers. Port D shares various I/O configurations
with the timer and I²C subsystems.
To avoid glitches on the output pins, data should be written to the I/O port data register before
writing ones to the corresponding data direction register bits to set the pins to output mode.
4.1 Input/output programming
The bidirectional port lines may be programmed as inputs or outputs under software control. The
direction of each pin is normally determined by the state of the corresponding bit in the port data
direction register (DDR). Each port has an associated DDR. Any standard I/O port pin is
configured as an output if its corresponding DDR bit is set to a logic one. A pin is configured as an
input if its corresponding DDR bit is cleared.
At power-on or reset, all DDRs are cleared, configuring all port pins as inputs. The data direction
registers can be written to or read by the MCU. During the programmed output state, a read of the
data register actually reads the value of the output data latch and not the I/O pin. The operation of
the standard port hardware is shown schematically in Figure 4-1.
This is summarized in Table 4-1, which shows the effect of reading from or writing to an I/O pin in
various circumstances. Note that the read/write signal shown is internal and not available to the
user.
Table 4-1 I/O pin states
R/W DDRn
Action of MCU write to/read of data bit
0
0 The I/O pin is in input mode. Data is written into the output data latch.
0
1 Data is written into the output data latch, and output to the I/O pin.
1
0 The state of the I/O pin is read.
1
1 The I/O pin is in output mode. The output data latch is read.
MC68HC05L28
INPUT/OUTPUT PORTS
TPG
MOTOROLA
4-1