MC68HC05L28 Datasheet, PDF (146/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

CTOF bit in CTCSR 5-3
CTOFE bit in CTCSR 5-4
D
data retention mode 2-12
data transfer 8-4
DDRA, DDRB, DDRD — port data direction registers 4-3
direct addressing mode 11-11
DISON bit in LCD 7-8
E
EEPGM bit in EEPROG 3-4
EEPROM
EEPROG — programming register 3-3
CPEN – charge pump enable 3-3
EEPGM – program control 3-4
EERC – RC oscillator control 3-4
ER1, ER0 – erase select 3-3
LATCH – latch control 3-4
erase mode select 3-3
EERC bit in EEPROG 3-4
, ELAT bit in PCR 3-5 A-5
EPROM
, bootloader mode 2-4 A-2
, PCR — programming register 3-5 A-5
ER1, ER0 bits in EEPROG 3-3
erase mode select 3-3
extended addressing mode 11-12
external clock 2-8
F
FDISP bit in LCD 7-8
flowcharts
interrupt 10-4
STOP mode 2-11
WAIT mode 2-13
FP0 – FP17 2-9
H
H-bit in CCR 11-3
I
I/O ports — see ports
I²C-bus 8-4
arbitration 8-4
clock synchronization 8-5
configuration 8-2
handshaking 8-5
interrupts 10-8
MADR — I²C-bus address register 8-6
MCR — I²C-bus control register 8-7
MDR — I²C-bus data register 8-10
MFDR — I²C-bus frequency divider register 8-6
MSR — I²C-bus status register 8-8
programming considerations 8-10
protocol 8-2
repeated START signal 8-4
, SCL 8-2 8-5
SDA 8-2
slave address transmission 8-2
START signal 8-2
STOP signal 8-4
I-bit in CCR 11-3
IC1F bit in TSR 6-7
IC1IE bit in TCR1 6-4
IC2F bit in TSR 6-7
IC2IE bit in TCR1 6-4
ICH1, ICL1 — input capture register 1 6-9
ICH2, ICL2 — input capture register 2 6-10
IEDG1 bit in TCR1 6-5
IEDG2 bit in TCR1 6-5
immediate addressing mode 11-11
indexed addressing modes 11-12
inherent addressing mode 11-11
input capture 6-9
– instruction set 11-3 11-10
– tables of instructions 11-5 11-10
interrupts
core timer 10-7
external 10-5
flowchart 10-4
I²C-bus 10-8
maskable 10-3
non-maskable 10-3
priorities 10-3
programmable timer 10-7
RTI 5-2
SWI 10-3
IRQ0 10-5
IRQ0, IRQ1, IRQ2 2-6
IRQ1 status/control register
IRQ1ENA – IRQ1 interrupt enable 10-5
IRQ1INT – IRQ1 interrupt flag 10-5
IRQ1LV, IRQ1EDG – IRQ1 interrupt sensitivity 10-5
IRQ1RST – IRQ1 interrupt flag reset bit 10-6
IRQ1VAL – IRQ1 pin status 10-6
IRQ2 status/control register
IRQ2ENA – IRQ2 interrupt enable 10-6
IRQ2INT – IRQ2 interrupt flag 10-6
IRQ2LV, IRQ2EDG – IRQ2 interrupt sensitivity 10-6
IRQ2RST – IRQ2 interrupt flag reset bit 10-7
IRQ2VAL – IRQ2 pin status 10-7
IRQED bit in OPT 1-3
J
junction temperature 12-2
MOTOROLA
vi
INDEX
TPG
MC68HC05L28