MC68HC05L28 Datasheet, PDF (148/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

ports
data direction registers 4-3
I/O programming 4-1
pin states 4-1
port D 4-2
port D configuration 4-4
port D control register 4-4
port D select register 4-4
port data registers 4-3
port structure 4-2
ports A and B 4-2
registers 4-3
power-on reset 10-1
programmable timer
block diagram 6-2
counter 6-3
during STOP mode 6-13
during WAIT mode 6-13
input capture register 1 6-9
input capture register 2 6-10
interrupts 10-7
output compare register 1 6-11
output compare register 2 6-12
timer state diagrams 6-13
R
RAM 3-1
RAM (LCD) 3-1
RAM bootloader mode (MC68HC05L28) 2-2
RAM bootloader mode (MC68HC705L28) A-4
real time interrupts 5-2
register outline 3-6
relative addressing mode 11-13
RESET 2-8
resets
COP 10-2
power-on 10-1
RESET pin 10-1
RT1, RT0 bits in CTCSR 5-4
RTI
real time interrupts 5-2
RTIE bit in CTCSR 5-4
RTIF bit in CTCSR 5-4
RVU – ROM verification units 14-2
RXAK bit in MSR 8-9
S
, SCL 8-2 8-5
SCL0 select bit in SELD 4-4
SDA 8-2
SDA0 select bit in SELD 4-4
SELD
SCL0 – I²C clock select 4-4
SDA0 – I²C data select 4-4
TCAP1 – timer capture 1 select 4-5
MOTOROLA
viii
TCAP2 – timer capture 2 select 4-5
TCMP1 – timer compare 1 select 4-5
TCMP2 – timer compare 2 select 4-5
SELD — port D select register 4-4
single chip mode 2-2
SP – stack pointer 11-2
SRW bit in MSR 8-9
STOP mode 2-10
flowchart 2-11
T
TCAP1 bit in TSR 6-8
TCAP1 select bit in SELD 4-5
TCAP2 bit in TSR 6-8
TCAP2 select bit in SELD 4-5
TCH, TCL — counter registers 6-3
TCMP1 select bit in SELD 4-5
TCMP2 select bit in SELD 4-5
TCR1 — timer control register 1
CO1E – timer compare 1 output enable 6-5
IC1IE – input capture 1 interrupt enable 6-4
IC2IE – input capture 2 interrupt enable 6-4
IEDG1 – input edge 1 6-5
IEDG2 – input edge 2 6-5
OC1IE – output compare 1 interrupt enable 6-4
OLVL1 – input edge 1 6-5
TOIE – timer overflow interrupt enable 6-5
TCR2 — timer control register 2
CO2E – output level 2 6-6
OC2IE – output compare 2 interrupt enable 6-6
OLVL2 – input edge 2 6-6
TOF bit in TSR 6-7
TOIE bit in TCR1 6-5
TRXD7 – TDR0 bits in MSR 8-10
TSR — timer status register
IC1F – input capture 1 flag 6-7
IC2F – input capture 2 flag 6-7
OC1F – output compare 1 flag 6-7
OC2F – output compare 2 6-8
TCAP1 – timer capture 1 6-8
TCAP2 – timer capture 2 6-8
TOF – timer overflow flag 6-7
TXAK bit in MCR 8-8
V
VDD, VSS 2-6
VLCDON bit in LCD 7-8
VPP6 A-4
VREFH, VREFL 2-9
W
WAIT mode 2-12
flowchart 2-13
INDEX
TPG
MC68HC05L28