MC68HC05L28 Datasheet, PDF (48/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

Table 4-2 I/O configuration functions
4 _4.4.4
DDRD
0
0
1
1
COND
0
1
0
1
Function
Input with pull-up
Input without pull-up
Push-pull output
Open-drain output without pull-up
Port D select register (SELD)
Port D select (SELD)
Address bit 7
$0033
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
PD5/
SCL0
PD4/
SDA0
PD3/ PD2/ PD1/ PD0/
TCMP2 TCAP2 TCMP1 TCAP1
0000 0000
Setting bits 5-0 in the port D select register to logical ‘1’ configures the pin to be dedicated to the
timer or the I²C bus subsystems. This select bit overrides the effect that the DDR register has on
the port direction. The user must ensure that the DDR and COND register bits are programmed
correctly to obtain the desired pin configuration.
PD5/SCL0 — Port D pin 5/SCL0 select
1 (set)
– This pin is configured as the I²C clock and is always an open-drain
I/O. If a pull-up is required then bit 5 in the DDRD and COND
registers must be cleared.
0 (clear) – This pin is configured as I/O pin PD5.
PD4/SDA0 — Port D pin 4/SCL1 select
1 (set)
– This pin is configured as the I²C data pin and is always an open-drain
I/O. If a pull-up is required then bit 4 in the DDRD and COND
registers must be cleared.
0 (clear) – This pin is configured as I/O pin PD4.
PD3/TCMP2 — Port D pin 3/TCMP2 select
1 (set) – This pin is configured as timer output compare 2 output. Setting bit 3
in the COND register makes it an open drain output
0 (clear) – This pin is configured as I/O pin PD3.
MOTOROLA
4-4
INPUT/OUTPUT PORTS
TPG
MC68HC05L28