MC68HC05L28 Datasheet, PDF (46/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

Data direction
register bit
DDRn
Latched data
Data
Output
I/O
register bit
buffer
pin
4
O/P
DDRn DATA I/O Pin
data
buffer
¹
0
0
Output _{ 1}
1
1
Input
buffer
Input


0
0
0 tristate
1 tristate
Figure 4-1 Standard I/O port structure
4.2 Ports A and B
These ports are standard M68HC05 bidirectional I/O ports, each comprising a data register and a
data direction register.
Reset does not affect the state of the data register, but clears the data direction register, thereby
returning all port pins to input mode. Writing a ‘1’ to any DDR bit sets the corresponding port pin
to output mode.
4.3 Port D
Port D is a 6-bit non-standard port which shares its pins with the timer and I²C subsystems. There
are four read/write registers associated with the port for defining the different functions. All the port
D pins can be configured as input/output pins or can be used by other subsystems within the MCU.
Setting bits 5-0 in the port D select register to logical ‘1’ configures the pin as dedicated to the timer
or I²C subsystems. For details of the alternative function of each port D pin see Section 2.2.8.
4.4 Port registers
The following sections explain in detail the individual bits in the data and control registers
associated with the ports.
MOTOROLA
4-2
INPUT/OUTPUT PORTS
TPG
MC68HC05L28