MC68HC05L28 Datasheet, PDF (111/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

11
CPU CORE AND INSTRUCTION SET
This section provides a description of the CPU core registers, the instruction set and the
addressing modes of the MC68HC05L28.
11.1
Registers
The MCU contains five registers, as shown in the programming model of Figure 11-1. The interrupt
stacking order is shown in Figure 11-2.
7
0
7
0
15
7
0
00
15
7
0
0000000011
7
0
111H I NZC
Accumulator
Index register
Program counter
Stack pointer
Condition code register
Carry / borrow
Zero
Negative
Interrupt mask
Half carry
11
Figure 11-1 Programming model
11.1.1 Accumulator (A)
The accumulator is a general purpose 8-bit register used to hold operands and results of arithmetic
calculations or data manipulations.
MC68HC05L28
CPU CORE AND INSTRUCTION SET
TPG
MOTOROLA
11-1