MC68HC05L28 Datasheet, PDF (91/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

TXSTART
BSET
BSET
LDA
STA
CLI
4,MCR
5,MCR
CALLING
MDR
;UNTIL IT IS CLEAR
;SET TRANSMIT MODE
;SET MASTER MODE
;i.e. GENERATE START CONDITION
;GET THE CALLING ADDRESS
;TRANSMIT THE CALLING ADDRESS
;ENABLE INTERRUPT
8.5.3 Software response
The transmission or reception of a byte sets the data transferring bit, MCF, which indicates that
one byte of communication is finished. Also, the I²C-bus interrupt bit, MIF, is set to generate an
I²C-bus interrupt (if MIEN is set). Figure 8-3 shows an example of a typical I²C-bus interrupt
routine. In the interrupt routine, the first step is for software to clear the MIF bit. The MCF bit can
be cleared by reading from the I²C-bus data I/O register (MDR) in receive mode, or by writing to
MDR in transmit mode. Software may service the I²C-bus I/O in the main program by monitoring
the MIF bit if the interrupt function is disabled. The following is an example of a software response
by a ‘master transmitter’ in the interrupt routine:
ISR
BCLR
1,MSR
;CLEAR THE MIF FLAG
BRCLR
5,MCR,SLAVE ;CHECK THE MSTA FLAG
BRCLR
;BRANCH IF SLAVE MODE
4,MCR,RECIEVE ;CHECK THE MODE FLAG
8
BRSET
0,MSR,END
;CHECK ACKNOWLEDGE FROM
;RECEIVER
;IF NO ACKNOWLEDGE, END
:TRANSMISSION
TRANSMIT
LDA
DATABUF
;GET THE NEXT BYTE OF DATA
MC68HC05L28
I²C-BUS
TPG
MOTOROLA
8-11