MC68HC05L28 Datasheet, PDF (60/156 Pages) Motorola, Inc – Flexible general-purpose microcomputer

Bits 8–15 — MSB of counter/alternate counter register
A read of only the more significant byte (MSB) transfers the LSB to a buffer, which remains fixed
after the first MSB read, until the LSB is also read.
Bits 0–7 — LSB of counter/alternate counter register
A read of only the less significant byte (LSB) receives the count value at the time of reading.
6.2
Timer functions
The 16-bit programmable timer is monitored and controlled by a group of fifteen registers, full
details of which are contained in the following paragraphs. An explanation of the timer functions is
also given.
6
6.2.1 Timer control registers
The timer control registers at locations $2C and $2D are read/write registers. Five bits control
interrupts associated with the timer status register flags IC1F, IC2F, OC1F, OC2F and TOF. Two
bits control which edge is significant to the input capture 1 and 2 edge detectors.
6.2.1.1 Timer control register 1 (TCR1)
Timer control 1 (TCR1)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$002C IC1IE IC2IE OC1IE TOIE CO1E IEDG1 IEDG2 OLVL1 0000 0uu0
IC1IE — Input capture 1 interrupt enable
1 (set) – Input capture 1 interrupt enabled.
0 (clear) – Input capture 1 interrupt disabled.
IC2IE — Input capture 2 interrupt enable
1 (set) – Input capture 2 interrupt enabled.
0 (clear) – Input capture 2 interrupt disabled.
OC1IE — Output compare 1 interrupt enable
1 (set) – Output compare 1 interrupt enabled.
0 (clear) – Output compare 1 interrupt disabled.
MOTOROLA
6-4
16-BIT PROGRAMMABLE TIMER
TPG
MC68HC05L28