LAN91C111 Datasheet, PDF (91/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

LAN91C111
FIGURE 12-1:
LAN91C111 ON VL BUS
VLBUS
W/nR
A2-A15
LCLK
M/nIO
nRESET
IRQn
D0-D31
nRDYRTN
nBE0-nBE3
nADS
Delay 1 LCLK
W/nR
A2-A15
LCLK
AEN
RESET
INTR0
LAN91C111
D0-D31
nRDYRTN
nBE0-nBE3
nADS
nCYCLE
nSRDY
nLDEV
nLRDY
nLDEV
O.C.
simulated
O.C.
12.3 High-End ISA or Non-Burst EISA Machines
On ISA machines, the LAN91C111 is accessed as a 16 bit peripheral. The signal connections are listed in the following
table:
TABLE 12-2: HIGH-END ISA OR NON-BURST EISA MACHINES SIGNAL CONNECTORS
ISA Bus
Signal
A1-A15
AEN
nIORD
LAN91C111 Signal
Notes
A1-A15
AEN
nRD
Address bus used for I/O space and register decoding.
Qualifies valid I/O decoding - enabled access when low.
I/O Read strobe - asynchronous read accesses. Address is valid before
leading edge.
DS00002276A-page 92
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