LAN91C111 Datasheet, PDF (66/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

LAN91C111
Symbol
TA1
TA0
Name
Turnaround
Time
D[15:0]....
Data
Definition
R/W
These bits provide some turnaround time for MDIO
R/W
When READ = 1, TA[1:0] = Z0
When WRITE = 1, TA[1:0] = 10
The turnaround time is a 2 bit time spacing between the Register
Address field and the Data field of a management frame to avoid
contention during a read transaction. For a read transaction, both the
STA and the PHY shall remain in a high impedance state for the first
bit time of the turnaround. The PHY shall drive a zero bit during the
second bit time of the turnaround of a read transaction. During a write
transaction, the STA shall drive a one bit for the first bit time of the
turnaround and a zero bit for the second bit time of the turnaround.
These 16 bits contain data to/from one of the eleven registers
Any
selected by register address bits REGAD[4:0].
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DS00002276A-page 67