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LAN91C111 Datasheet, PDF (72/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY
LAN91C111
LNKDIS:
XMTDIS:
XMTPDN:
RESERVED:
BYPSCR:
UNSCDS:
EQLZR:
CABLE
RLVL0
Link Disable
TP Transmit
TP Transmit
Powerdown
RESERVED
Bypass
Scrambler/Descr-
ambler Select
Unscrambled Idle
Reception Disable
Receive Equalizer
Select
Cable Type Select
Receive Input
1 = Receive Link Detect Function
Disabled (Force Link Pass)
0 = Normal
1 = TP Transmitter Disabled
0 = Normal
1 = TP Transmitter Powered Down
0 = Normal
Reserved, Must be 0 for Proper
Operation
1 = Bypass Scrambler/Descrambler
0 = No Bypass
1 = Disable Auto-Negotiation with
devices that transmit unscrambled
idle on powerup and various
instances
0 = Enables Auto-Negotiation with
devices that transmit unscrambled
idle on powerup and various
instances
1 = Receive Equalizer Disabled, Set
To 0 Length
0 = Receive Equalizer On (For
100MB Mode Only)
1 = STP (150 Ohm)
0 = UTP (100 Ohm)
1 = Receive Squelch Levels Reduced
By 4.5 dB R/W
TLVL0-3
TRF0-1
Level Adjust
Transmit Output
Level Adjust
Transmitter
Rise/Fall Time
Adjust
0 = Normal
See Table 7-2
11 = -0.25nS
10 = +0.0nS
01 = +0.25nS
00 = +0.50nS
9.7 Register 17. Configuration 2 - Structure and Bit Definition
Reserved
R
1
Reserved
R
1
Reserved
R
1
Reserved
R
1
Reserved
R
1
Reserved
R
1
Reserved
R
1
Reserved
R
1
Reserved
R
0
Reserved
R
0
APOLDIS
RW
0
JABDIS
RW
0
MREG
RW
0
INTMDIO
RW
0
Reserved
RW
0
Reserved
RW
0
 2011-2016 Microchip Technology Inc.
DS00002276A-page 73