LAN91C111 Datasheet, PDF (41/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

LAN91C111
TABLE 8-1: INTERNAL I/O SPACE MAPPING
BANK0
0
TCR
2
EPH STATUS
4
RCR
6
COUNTER
8
MIR
A
RPCR
C
RESERVED
E
BANK
BANK1
CONFIG
BASE
IA0-1
IA2-3
IA4-5
GENERAL PURPOSE
CONTROL
BANK
BANK2
MMU COMMAND
PNR
FIFO PORTS
POINTER
DATA
DATA
INTERRUPT
BANK
A special BANK (BANK7) exists to support the addition of external registers.
8.4 Bank Select Register
BANK3
MT0-1
MT2-3
MT4-5
MT6-7
MGMT
REVISION
RCV
BANK
OFFSET
NAME
TYPE
E
BANK SELECT REGISTER READ/WRITE
SYMBOL
BSR
HIGH
BYTE
LOW
BYTE
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
0
0
1
1
0
0
1
1
BS2
BS1
BS0
X
X
X
X
X
0
0
0
BS2, BS1, BS0 Determine the bank presently in use. This register is always accessible and is used to select the register
bank in use.
The upper byte always reads as 33h and can be used to help determine the I/O location of the LAN91C111.
The BANK SELECT REGISTER is always accessible regardless of the value of BS0-2.
Note:
The bank select register can be accessed as a doubleword at offset 0x0Ch, as a word at offset 0x0Eh, or
as a byte at offset 0x0Eh, A doubleword write to offset 0x0Ch will write the BANK SELECT REGISTER but
will not write the registers 0x0Ch and 0x0Dh, but will only write to register 0x0Eh.
BANK 7 has no internal registers other than the BANK SELECT REGISTER itself. On valid cycles where BANK7 is
selected (BS0=BS1=BS2=1), and A3=0, nCSOUT is activated to facilitate implementation of external registers.
Note: BANK7 does not exist in LAN91C9x devices. For backward S/W compatibility BANK7 accesses should be
done if the Revision Control register indicates the device is the LAN91C111.
Bank 7 is a new register Bank to the Microchip LAN91C111 device. This bank has extended registers that allow the
extended feature set of the Microchip LAN91C111.
 2011-2016 Microchip Technology Inc.
DS00002276A-page 41