LAN91C111 Datasheet, PDF (106/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

FIGURE 14-6:
BURST READ CYCLES - NVLBUS=1
Clock
t17 t12
t14
nDATACS
W/nR
nCYCLE
Read Data
nRDYRTN
t19
a
b
t15
LAN91C111
t12A
t17A
t19
c
Parameter
t12
t12A
t14
t15
t17
t17A
t19
nDATACS Setup to LCLK Rising
nDATACS Hold after LCLK Rising
nRDYRTN Setup to LCLK Falling
nRDYRTN Hold after LCLK Falling
W/nR Setup to LCLK Falling
W/nR Hold After LCLK Falling
Data Delay from LCLK Rising (Read)
MIN
20
0
10
10
15
3
5
TYP MAX
Units
ns
ns
ns
ns
ns
ns
15
ns
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DS00002276A-page 107