LAN91C111 Datasheet, PDF (27/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

LAN91C111
Reference
Time (NS) Internal MAU
Voltage (V)
G
57
-1.0
H
48
0.7
I
67
0.6
J
89
0
K
74
-0.55
L
73
-0.55
M
61
0
N
85
1.0
O
100
0.4
P
110
0.75
Q
111
0.15
R
111
0
S
111
-0.15
T
110
-1.0
U
100
-0.3
V
110
-0.7
W
90
-0.7
7.7.7.3 Transmit Level Adjust
The transmit output current level is derived from an internal reference voltage and the external resistor on RBIAS pin.
The transmit level can be adjusted with either (1) the external resistor on the RBIAS pin, or (2) the four transmit level
adjust bits in the PHY Ml serial port Configuration 1 register as shown in Table 7-2. The adjustment range is approxi-
mately -14% to +16% in 2% steps.
TABLE 7-2:
TRANSMIT LEVEL ADJUST
TLVL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
Gain
1.16
1.14
1.12
1.10
1.08
1.06
1.04
1.02
 2011-2016 Microchip Technology Inc.
DS00002276A-page 27