LAN91C111 Datasheet, PDF (71/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

LAN91C111
9.4.4 T4 - 100BASE-T4
A '1' indicates the PHY is capable of 100BASE-T4
9.4.5 TX_FDX - 100BASE-TX FULL DUPLEX CAPABLE
A '1' indicates the PHY is capable of 100BASE-TX Full Duplex
9.4.6 TX_HDX - 100BASE-TX HALF DUPLEX CAPABLE
A '1' indicates the PHY is capable of 100BASE-TX Half Duplex
9.4.7 10_FDX - 10BASE-T FULL DUPLEX CAPABLE
A '1' indicates the PHY is capable of 10BASE-T Full Duplex
9.4.8 10_HDX - 10BASE-T HALF DUPLEX CAPABLE
A '1' indicates the PHY is capable of 10BASE-T Half Duplex
The management entity sets the value of this field prior to Auto-Negotiation.
‘1’ in these bit indicates that the mode of operation that corresponds to these will be acceptable to be auto-negotiated
to. Only modes supported by the PHY can be set.
9.4.9 CSMA
A '1' indicates the PHY is capable of 802.3 CSMA Operation.
9.5 Register 5. Auto-Negotiation Remote End Capability Register
NP
ACK
R
R
0
0
RF
Reserved Reserved Reserved
T4
TX_FDX
R
R
R
R
R
R
0
0
0
0
0
0
TX_HDX
R
0
10_FDX
R
0
10_HDX
R
0
Reserved
R
0
Reserved
R
0
Reserved
R
0
The bit definitions are analogous to the Auto-Negotiation Advertisement Register.
9.6 Register 16. Configuration 1- Structure and Bit Definition
Reserved
R
0
CSMA
R
0
LNKDIS
RW
0
XMTDIS
RW
0
XMTPDN
RW
0
Reserved
RW
0
Reserved
RW
0
BYPSCR
RW
0
UNSCDS
RW
0
EQLZR
RW
0
CABLE
RW
0
RLVL0
RW
0
TLVL3
RW
1
TLVL2
RW
0
TLVL1
RW
0
TLVL0
RW
0
TRF1
RW
1
TRF0
RW
0
DS00002276A-page 72
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