LAN91C111 Datasheet, PDF (63/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

8.25 Bank 3 - RCV Register
OFFSET
C
NAME
RCV REGISTER
LAN91C111
TYPE
READ/WRITE
SYMBOL
RCV
HIGH
BYTE
LOW
BYTE
0
RCV
DISCRD
0
0
0
Reserved Reserved
0
0
Reserved
0
MBO
0
MBO
1
1
0
MBO
1
0
MBO
1
0
MBO
1
RCV DISCRD - Set to discard a packet being received. Will discard packets only in the process of being received. When
set prior to the end of receive packet, bit 4 (RXOVRN) of the interrupt status register will be set to indicate that the packet
was discarded. Otherwise, the packet will be received normally and bit 0 set (RCVINT) in the interrupt status register.
RCV DISCRD is self clearing.
MBO - Must be 1.
8.26 Bank 7 - External Registers
OFFSET
NAME
TYPE
SYMBOL
0
THROUG
H7
EXTERNAL REGISTERS
nCSOUT is driven low by the LAN91C111 when a valid access to the EXTERNAL REGISTER range occurs.
HIGH
BYTE
EXTERNAL R/W REGISTER
LOW
BYTE
EXTERNAL R/W REGISTER
Cycle
AEN=0
A3=0
A4-15 matches I/O BASE
BANK SELECT = 7
BANK SELECT = 4,5,6
Otherwise
nCSOUT
Driven low. Transparently latched on nADS
rising edge.
LAN91C111 Data Bus
Ignored on writes.
Tri-stated on reads.
High
High
Ignore cycle.
Normal LAN91C111 cycle.
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DS00002276A-page 63