LAN91C111 Datasheet, PDF (83/125 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

LAN91C111
FIGURE 10-4:
TXEMPTY INTR (ASSUMES AUTO RELEASE OPTION SELECTED)
TXEMPTY INTR
Write Acknowledge Reg. with
TXEMPTY Bit Set
Read TXEMPTY & TX INTR
TXEMPTY = 0
&
TXINT = 0
(Waiting for Completion)
TXEMPTY = X
&
TXINT = 1
(Transmission Failed)
TXEMPTY = 1
&
TXINT = 0
(Everything went through
successfully)
Read Pkt. # Register & Save
Write Address Pointer
Register
Read Status Word from RAM
Update Statistics
Issue "Release" Command
Update Variables
Acknowledge TXINTR
Re-Enable TXENA
Restore Packet Number
Return to ISR
DS00002276A-page 84
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