PIC18F6390 Datasheet, PDF (89/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
6.0 FLASH PROGRAM MEMORY
In PIC18F6390/6490/8390/8490 devices, the program
memory is implemented as read-only Flash memory. It
is readable over the entire VDD range during normal
operation. A read from program memory is executed on
one byte at a time.
6.1 Table Reads
For PIC18 devices, there are two operations that allow
the processor to move bytes between the program
memory space and the data RAM: table read (TBLRD)
and table write (TBLWT).
Table read operations retrieve data from program
memory and place it into the data RAM space.
Figure 6-1 shows the operation of a table read with
program memory and data RAM.
The program memory space is 16 bits wide, while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register, TABLAT.
Table reads work with byte entities. A table block
containing data, rather than program instructions, is not
required to be word-aligned. Therefore, a table block can
start and end at any byte address.
Because the program memory cannot be written to or
erased under normal operation, the TBLWT operation is
not discussed here.
Note 1: Although it cannot be used in
PIC18F6390/6490/8390/8490 devices in
normal operation, the TBLWT instruction
is still implemented in the instruction set.
Executing the instruction takes two
instruction cycles, but effectively results
in a NOP.
2: The TBLWT instruction is available only in
programming modes and is used during
In-Circuit Serial Programming™ (ICSP™).
FIGURE 6-1:
TABLE READ OPERATION
Instruction: TBLRD*
Table Pointer⁽¹⁾
TBLPTRU TBLPTRH TBLPTRL
Program Memory
Table Latch (8-bit)
TABLAT
Program Memory
(TBLPTR)
Note 1: Table Pointer register points to a byte in program memory.
 2004 Microchip Technology Inc.
Preliminary
DS39629B-page 87