PIC18F6390 Datasheet, PDF (219/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
17.0 ADDRESSABLE UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (AUSART)
The Addressable Universal Synchronous Asynchro-
nous Receiver Transmitter (AUSART) module is very
similar in function to the Enhanced USART module,
discussed in the previous chapter. It is provided as an
additional channel for serial communication with
external devices, for those situations that do not require
auto-baud detection or LIN bus support.
The AUSART can be configured in the following modes:
• Asynchronous (full-duplex)
• Synchronous – Master (half-duplex)
• Synchronous – Slave (half-duplex)
The pins of the AUSART module are multiplexed with
the functions of PORTG (RG1/TX2/CK2/SEG29 and
RG2/RX2/DT2/SEG28, respectively). In order to
configure these pins as an AUSART:
• bit SPEN (RCSTA2<7>) must be set (= 1)
• bit TRISG<2> must be set (= 1)
• bit TRISG<1> must be cleared (= 0) for
Asynchronous and Synchronous Master modes
• bit TRISG<1> must be set (= 1) for Synchronous
Slave mode
Note:
The AUSART control will automatically
reconfigure the pin from input to output as
needed.
The operation of the Addressable USART module is
controlled through two registers, TXSTA2 and
RXSTA2. These are detailed in Register 17-1 and
Register 17-2 respectively.
 2004 Microchip Technology Inc.
Preliminary
DS39629B-page 217