PIC18F6390 Datasheet, PDF (123/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
TABLE 9-10: PORTE FUNCTIONS
Pad Name
Function
TRIS
Setting
I/O
Buffer
Description
RE4/COM1
RE4
0
O
DIG LATE<4> data output; disabled when LCD common enabled.
1
I
ST PORTE<4> data input.
COM1
x
O
ANA Common 1 analog output for LCD.
RE5/COM2
RE5
0
O
DIG LATE<5> data output; disabled when LCD common enabled.
1
I
ST PORTE<5> data input.
COM2
x
O
ANA Common 2 analog output for LCD.
RE6/COM3
RE6
0
O
DIG LATE<6> data output; disabled when LCD segment enabled.
1
I
ST PORTE<6> data input.
COM3
x
O
ANA Common 3 analog output for LCD.
RE7/CCP2/
RE7
0
SEG31
1
CCP2⁽¹⁾
0
O
DIG LATE<7> data output; disabled when LCD segment enabled.
I
ST PORTE<7> data input.
O
DIG CCP2 compare output and CCP2 PWM output; takes priority over port data.
1
I
ST CCP2 capture input.
SEG31
x
O
ANA Segment 31 analog output for LCD.
Legend:
Note 1:
PWR = Power Supply, O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignment for CCP2 when configuration bit CCP2MX = 0.
TABLE 9-11: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PORTE
RE7
RE6
RE5
RE4
—
—
LATE
LATE Data Output Register
—
—
TRISE
PORTE Data Direction bits
—
—
LCDCON LCDEN SLPEN WERR
—
CS1
CS0
LCDSE3
SE31
SE30
SE29
SE28
SE27
SE26
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTE.
—
—
—
LMUX1
SE25
Bit 0
—
—
—
LMUX0
SE24
Reset
Values
on Page
62
62
62
64
64
 2004 Microchip Technology Inc.
Preliminary
DS39629B-page 121