PIC18F6390 Datasheet, PDF (401/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
Data Memory ..................................................................... 71
Access Bank .............................................................. 73
and the Extended Instruction Set ............................... 84
Bank Select Register (BSR) ....................................... 71
General Purpose Registers ........................................ 73
Map for PIC18F6X90/8X90 Devices .......................... 72
Special Function Registers ........................................ 74
DAW ................................................................................. 314
DC and AC Characteristics
Graphs and Tables .................................................. 387
DC Characteristics ........................................................... 363
Power-Down and Supply Current ............................ 354
Supply Voltage ......................................................... 353
DCFSNZ .......................................................................... 315
DECF ............................................................................... 314
DECFSZ ........................................................................... 315
Demonstration Boards
PICDEM 1 ................................................................ 348
PICDEM 17 .............................................................. 349
PICDEM 18R ........................................................... 349
PICDEM 2 Plus ........................................................ 348
PICDEM 3 ................................................................ 348
PICDEM 4 ................................................................ 348
PICDEM LIN ............................................................ 349
PICDEM USB ........................................................... 349
PICDEM.net Internet/Ethernet ................................. 348
Development Support ...................................................... 345
Device Differences ........................................................... 393
Device Overview .................................................................. 7
Features (table) ............................................................ 9
New Core Features ...................................................... 7
Special Features .......................................................... 8
Direct Addressing ............................................................... 82
E
Effect on Standard PIC Instructions ........................... 84, 342
Effects of Power Managed Modes on
Various Clock Sources ............................................... 39
Electrical Characteristics .................................................. 351
Enhanced Universal Synchronous
Asynchronous Receiver Transmitter (EUSART).
See EUSART.
Equations
A/D Acquisition Time ................................................ 236
A/D Minimum Charging Time ................................... 236
Errata ................................................................................... 5
EUSART
Asynchronous Mode ................................................ 206
12-Bit Break Transmit and Receive ................. 211
Associated Registers, Receive ........................ 209
Associated Registers, Transmit ....................... 207
Auto-Wake-up on Sync Break ......................... 210
Receiver ........................................................... 208
Setting up 9-Bit Mode with
Address Detect ........................................ 208
Transmitter ....................................................... 206
Baud Rate Generator (BRG) .................................... 201
Associated Registers ....................................... 201
Auto-Baud Rate Detect .................................... 204
Baud Rate Error, Calculating ........................... 201
Baud Rates, Asynchronous Modes ................. 202
High Baud Rate Select (BRGH Bit) ................. 201
Sampling .......................................................... 201
Synchronous Master Mode ...................................... 212
Associated Registers, Receive ........................ 214
Associated Registers, Transmit ....................... 213
Reception ........................................................ 214
Transmission ................................................... 212
Synchronous Slave Mode ........................................ 215
Associated Registers, Receive ........................ 216
Associated Registers, Transmit ....................... 215
Reception ........................................................ 216
Transmission ................................................... 215
Evaluation and Programming Tools ................................. 349
Extended Instruction Set
ADDFSR .................................................................. 338
ADDULNK ............................................................... 338
CALLW .................................................................... 339
MOVSF .................................................................... 339
MOVSS .................................................................... 340
PUSHL ..................................................................... 340
SUBFSR .................................................................. 341
SUBULNK ................................................................ 341
External Clock Input ........................................................... 32
F
Fail-Safe Clock Monitor ........................................... 281, 290
Interrupts in Power
Managed Modes .............................................. 291
POR or Wake from Sleep ........................................ 291
WDT During Oscillator Failure ................................. 290
Fast Register Stack ........................................................... 68
Firmware Instructions ...................................................... 295
Flash Program Memory ..................................................... 87
Associated Registers ................................................. 89
Control Registers ....................................................... 88
TABLAT (Table Latch) Register ........................ 88
TBLPTR (Table Pointer) Register ...................... 88
Reading ..................................................................... 88
Table Reads .............................................................. 87
FSCM. See Fail-Safe Clock Monitor.
G
GOTO .............................................................................. 316
H
Hardware Multiplier ............................................................ 91
Introduction ................................................................ 91
Operation ................................................................... 91
Performance Comparison .......................................... 91
High/Low-Voltage Detect ................................................. 251
Applications ............................................................. 254
Typical Low-Voltage
Detect (diagram) ...................................... 254
Associated Registers ............................................... 255
Current Consumption .............................................. 253
Effects of a Reset .................................................... 255
Operation ................................................................. 252
During Sleep .................................................... 255
Setup ....................................................................... 253
Start-up Time ........................................................... 253
HLVD. See High/Low-Voltage Detect.
 2004 Microchip Technology Inc.
Preliminary
DS39629B-page 399