PIC18F6390 Datasheet, PDF (63/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
ADRESH
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADRESL
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON0
6X90 8X90
--00 0000
--00 0000
--uu uuuu
ADCON1
6X90 8X90
--00 0000
--00 0000
--uu uuuu
ADCON2
6X90 8X90
0-00 0000
0-00 0000
u-uu uuuu
CCPR1H
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1L
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
6X90 8X90
--00 0000
--00 0000
--uu uuuu
CCPR2H
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR2L
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP2CON
6X90 8X90
--00 0000
--00 0000
--uu uuuu
CVRCON
6X90 8X90
000- 0000
000- 0000
uuu- uuuu
CMCON
6X90 8X90
0000 0111
0000 0111
uuuu uuuu
TMR3H
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR3L
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
T3CON
6X90 8X90
0000 0000
uuuu uuuu
uuuu uuuu
SPBRG1
6X90 8X90
0000 0000
0000 0000
uuuu uuuu
RCREG1
6X90 8X90
0000 0000
0000 0000
uuuu uuuu
TXREG1
6X90 8X90
0000 0000
0000 0000
uuuu uuuu
TXSTA1
6X90 8X90
0000 0010
0000 0010
uuuu uuuu
RCSTA1
6X90 8X90
0000 000x
0000 000x
uuuu uuuu
IPR3
PIR3
6X90 8X90
6X90 8X90
-111 ----
-000 ----
-111 ----
-000 ----
-uuu ----
-uuu ----⁽¹⁾
PIE3
6X90 8X90
-000 ----
-000 ----
-uuu ----
IPR2
PIR2
6X90 8X90
6X90 8X90
11-- 1111
00-- 0000
11-- 1111
00-- 0000
uu-- uuuu
uu-- uuuu⁽¹⁾
PIE2
6X90 8X90
00-- 0000
00-- 0000
uu-- uuuu
IPR1
PIR1
6X90 8X90
6X90 8X90
-111 1111
-000 0000
-111 1111
-000 0000
-uuu uuuu
-uuu uuuu⁽¹⁾
PIE1
6X90 8X90
-000 0000
-000 0000
-uuu uuuu
OSCTUNE
6X90 8X90
00-0 0000
00-0 0000
uu-u uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-3 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
 2004 Microchip Technology Inc.
Preliminary
DS39629B-page 61