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PIC18F6390 Datasheet, PDF (61/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology
PIC18F6390/6490/8390/8490
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Applicable
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
TOSU
TOSH
TOSL
STKPTR
6X90
6X90
6X90
6X90
8X90
8X90
8X90
8X90
---0 0000
0000 0000
0000 0000
uu-0 0000
---0 0000
0000 0000
0000 0000
00-0 0000
---0 uuuu(3)
uuuu uuuu(3)
uuuu uuuu(3)
uu-u uuuu(3)
PCLATU
6X90 8X90
---0 0000
---0 0000
---u uuuu
PCLATH
PCL
6X90 8X90
6X90 8X90
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
PC + 2(2)
TBLPTRU
6X90 8X90
--00 0000
--00 0000
--uu uuuu
TBLPTRH
6X90 8X90
0000 0000
0000 0000
uuuu uuuu
TBLPTRL
6X90 8X90
0000 0000
0000 0000
uuuu uuuu
TABLAT
6X90 8X90
0000 0000
0000 0000
uuuu uuuu
PRODH
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
PRODL
INTCON
INTCON2
INTCON3
6X90 8X90
6X90 8X90
6X90 8X90
6X90 8X90
xxxx xxxx
0000 000x
1111 1111
1100 0000
uuuu uuuu
0000 000u
1111 1111
1100 0000
uuuu uuuu
uuuu uuuu(1)
uuuu uuuu(1)
uuuu uuuu(1)
INDF0
6X90 8X90
N/A
N/A
N/A
POSTINC0
6X90 8X90
N/A
N/A
N/A
POSTDEC0
6X90 8X90
N/A
N/A
N/A
PREINC0
6X90 8X90
N/A
N/A
N/A
PLUSW0
6X90 8X90
N/A
N/A
N/A
FSR0H
6X90 8X90
---- xxxx
---- uuuu
---- uuuu
FSR0L
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
WREG
6X90 8X90
xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF1
6X90 8X90
N/A
N/A
N/A
POSTINC1
6X90 8X90
N/A
N/A
N/A
POSTDEC1
6X90 8X90
N/A
N/A
N/A
PREINC1
6X90 8X90
N/A
N/A
N/A
PLUSW1
6X90 8X90
N/A
N/A
N/A
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-3 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
 2004 Microchip Technology Inc.
Preliminary
DS39629B-page 59