PIC18F6390 Datasheet, PDF (171/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
REGISTER 15-5:
SSPCON2: MSSP CONTROL REGISTER 2 (I²C™ MODE)
R/W-0
GCEN
R/W-0
R/W-0
R/W-0 R/W-0 R/W-0
ACKSTAT ACKDT⁽¹⁾ ACKEN⁽²⁾ RCEN⁽²⁾ PEN⁽²⁾
bit 7
R/W-0
RSEN⁽²⁾
R/W-0
SEN⁽²⁾
bit 0
bit 7 GCEN: General Call Enable bit (Slave mode only)
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
bit 6 ACKSTAT: Acknowledge Status bit (Master Transmit mode only)
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
bit 5 ACKDT: Acknowledge Data bit (Master Receive mode only)⁽¹⁾
1 = Not Acknowledge
0 = Acknowledge
bit 4 ACKEN: Acknowledge Sequence Enable bit (Master Receive mode only)⁽²⁾
1 = Initiate Acknowledge sequence on SDA and SCL pins and transmit ACKDT data bit.
Automatically cleared by hardware.
0 = Acknowledge sequence Idle
bit 3 RCEN: Receive Enable bit (Master mode only)⁽²⁾
1 = Enables Receive mode for I²C
0 = Receive Idle
bit 2 PEN: Stop Condition Enable bit (Master mode only)⁽²⁾
1 = Initiate Stop condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Stop condition Idle
bit 1 RSEN: Repeated Start Condition Enable bit (Master mode only)⁽²⁾
1 = Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Repeated Start condition Idle
bit 0 SEN: Start Condition Enable/Stretch Enable bit⁽²⁾
In Master mode:
1 = Initiate Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Start condition Idle
In Slave mode:
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
Note 1: Value that will be transmitted when the user initiates an Acknowledge sequence at
the end of a receive.
2: If the I²C module is not in the Idle mode, this bit may not be set (no spooling) and
the SSPBUF may not be written (or writes to the SSPBUF are disabled).
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
 2004 Microchip Technology Inc.
Preliminary
DS39629B-page 169